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Book synopsis

This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.

Book details

• Full title: Test Generation of Crosstalk Delay Faults in VLSI Circuits
• Author: S. Jayanthy, M. C. Bhuvaneswari
• Language: English
• Binding: Paperback
• Number of pages: 156
• EAN: 9789811347849
• ISBN: 9811347840
• ID: 21144360
• Publisher: Springer Verlag, Singapore
• Weight: 454 g
• Dimensions: 235 × 155 × 10 mm
• Date of publishing: 21. December 2018

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