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Więcej informacji o Low-Power Variation-Tolerant Design in Nanometer Silicon

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Opis

Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-threshold assignment and gate sizing can have large negative impact on parametric yield under process variations. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations. We consider both logic and memory design aspects and cover modeling and analysis, as well as design methodology to achieve simultaneously low power and variation tolerance, while minimizing design overhead. This book will discuss current industrial practices and emerging challenges at future technology nodes.

Szczegóły książki

Kategoria Książki po angielsku Technology, engineering, agriculture Electronics & communications engineering Electronics engineering

• Pełny tytuł: Low-Power Variation-Tolerant Design in Nanometer Silicon
• Autor: Swarup Bhunia, Saibal Mukhopadhyay
• Język: Angielski
• Oprawa: Twarda
• Liczba stron: 440
• EAN: 9781441974174
• ISBN: 1441974172
• ID: 01424210
• Wydawca: Springer-Verlag New York Inc.
• Waga: 1800 g
• Wymiary: 235 × 155 × 35 mm
• Data wydania: 24. November 2010

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